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IEICE Trans

Jun YAMASHITA

SAT-Based Test Generation for Open Faults Using Fault Excitation Caused by Effect of Adjacent Lines
Jun YAMASHITA Hiroyuki YOTSUYANAGI Masaki HASHIZUME Kozo KINOSHITA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2013/12/01
Vol. E96-A  No. 12  pp. 2561-2567
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Logic Synthesis, Test and Verification
Keyword: 
open faults, adjacent lines, test pattern generation, coupling capacitance, SAT-based ATPG, 
 Summary | Full Text:PDF
A Motion Vector Search Algorithm Based on a Simple Search-Block Interpolation Scheme
Yankang WANG Makoto ANDO Tomohiro TANIKAWA Kazuhiro YOSHIDA Jun YAMASHITA Hideaki KUZUOKA Michitaka HIROSE 
Publication:   IEICE TRANSACTIONS on Communications
Publication Date: 2004/02/01
Vol. E87-B  No. 2  pp. 384-389
Type of Manuscript:  LETTER
Category: Multimedia Systems
Keyword: 
motion estimation, motion vector, block matching, interpolation, 
 Summary | Full Text:PDF