An All-Digital CMOS Duty Cycle Correction Circuit with a Duty-Cycle Correction Range of 15-to-85% for Multi-Phase Applications Jang-Jin NAMHong-June PARK
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2005/04/01 Vol. E88-CNo. 4pp. 773-777 Type of Manuscript: LETTER Category: Electronic Circuits Keyword: duty cycle correction, all-digital, multi-phase clock, PLL/DLL,