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IEICE Trans

Jae Young HUR

Virtual Address Remapping with Configurable Tiles in Image Processing Applications
Jae Young HUR 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2020/02/01
Vol. E103-D  No. 2  pp. 309-320
Type of Manuscript:  PAPER
Category: Computer System
Keyword: 
address mapping, memory management units, image processing, performance, embedded system architectures, 
 Summary | Full Text:PDF
Block Level TLB Coalescing for Buddy Memory Allocator
Jae Young HUR 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2019/10/01
Vol. E102-D  No. 10  pp. 2043-2046
Type of Manuscript:  LETTER
Category: Computer System
Keyword: 
architectures, memory allocation, translation lookaside buffer, page table, performance, 
 Summary | Full Text:PDF