Warning: Undefined array key "abst" in /var/www/02search_html/bin/author.php on line 56

Warning: Undefined array key "abst" in /var/www/02search_html/bin/author.php on line 203

Warning: Undefined array key "abst" in /var/www/02search_html/bin/author.php on line 203

Warning: Undefined array key "abst" in /var/www/02search_html/bin/author.php on line 203

Warning: Undefined array key "abst" in /var/www/02search_html/bin/author.php on line 203

Warning: Undefined array key "abst" in /var/www/02search_html/bin/author.php on line 212

Warning: Undefined array key "abst" in /var/www/02search_html/bin/author.php on line 276

Warning: Undefined array key "abst" in /var/www/02search_html/bin/author.php on line 276

Warning: Undefined array key "abst" in /var/www/02search_html/bin/author.php on line 276

Warning: Undefined array key "abst" in /var/www/02search_html/bin/author.php on line 276

Warning: Undefined array key "abst" in /var/www/02search_html/bin/author.php on line 276

Warning: Undefined array key "abst" in /var/www/02search_html/bin/author.php on line 304

Warning: Undefined array key "abst" in /var/www/02search_html/bin/author.php on line 323
IEICE Trans

Hyungon KIM


Novel Method of Interconnect Worstcase Establishment with Statistically-Based Approaches
Won-Young JUNG Hyungon KIM Yong-Ju KIM Jae-Kyung WEE 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2008/04/01
Vol. E91-A  No. 4  pp. 1177-1184
Type of Manuscript:  PAPER
Category: VLSI Design Technology and CAD
Keyword: 
process-induced variationinterconnect worstcase optimizationeffective common geometry (ECG)accumulated maximum probability (AMP)non-normal distribution
 Summary | Full Text:PDF