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IEICE Trans

Hung-Yu CHEN

A System-Level Model of Design Space Exploration for a Tile-Based 3D Graphics SoC Refinement
Liang-Bi CHEN Chi-Tsai YEH Hung-Yu CHEN Ing-Jer HUANG 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2009/12/01
Vol. E92-A  No. 12  pp. 3193-3202
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Embedded, Real-Time and Reconfigurable Systems
Keyword: 
design space exploration, system-on-a-chip (SoC), SystemC, UML, 3D graphics, 
 Summary | Full Text:PDF