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IEICE Trans

Hiroyuki KONO

A 250 MHz Dual Port Cursor RAM Using Dynamic Data Alignment Architecture
Yasunobu NAKASE Hiroyuki KONO Yoshio MATSUDA Hisanori HAMANO 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1998/11/25
Vol. E81-C  No. 11  pp. 1750-1756
Type of Manuscript:  PAPER
Category: Electronic Circuits
Keyword: 
dual port SRAM, computer graphics, cursor, 
 Summary | Full Text:PDF