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IEICE Trans

Hiromasa KOBAYASHI

Novel via Chain Structure for Failure Analysis at 65 nm-Node Fixing OPC Using Inner and Outer via Chain Dummy Patterns
Takashi NASUNO Yoshihisa MATSUBARA Hiromasa KOBAYASHI Akiyuki MINAMI Eiichi SODA Hiroshi TSUDA Koichiro TSUJITA Wataru WAKAMIYA Nobuyoshi KOBAYASHI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2005/05/01
Vol. E88-C  No. 5  pp. 796-803
Type of Manuscript:  Special Section PAPER (Special Section on Microelectronic Test Structures)
Category: 
Keyword: 
test structure, 65 nm-node, via chain, OBIRCH, failure analysis, 
 Summary | Full Text:PDF