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IEICE Trans

Hiroaki KITANO

Robustness of the Memory-Based Reasoning Implemented by Wafer Scale Integration
Moritoshi YASUNAGA Hiroaki KITANO 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 1993/03/25
Vol. E76-D  No. 3  pp. 336-344
Type of Manuscript:  PAPER
Category: Fault Tolerant Computing
Keyword: 
fault tolerant computing, artificial intelligence and computer hardware design, 
 Summary | Full Text:PDF