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IEICE Trans

Hideyuki MATSUOKA

A Robust Array Architecture for a Capacitorless MISS Tunnel-Diode Memory
Satoru HANZAWA Takeshi SAKATA Tomonori SEKIGUCHI Hideyuki MATSUOKA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2003/09/01
Vol. E86-C  No. 9  pp. 1886-1893
Type of Manuscript:  PAPER
Category: Integrated Electronics
Keyword: 
emerging memory, MISS tunnel-diode, hierarchical bit-line structure, twin dummy-cell, 
 Summary | Full Text:PDF