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IEICE Trans

Futoshi IGAUE

An Embedded DRAM Hybrid Macro with Auto Signal Management and Enhanced-on-Chip Tester
Naoya WATANABE Fukashi MORISHITA Yasuhiko TAITO Akira YAMAZAKI Tetsushi TANIZAKI Katsumi DOSAKA Yoshikazu MOROOKA Futoshi IGAUE Katsuya FURUE Yoshihiro NAGURA Tatsunori KOMOIKE Toshinori MORIHARA Atsushi HACHISUKA Kazutami ARIMOTO Hideyuki OZAKI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2003/04/01
Vol. E86-C  No. 4  pp. 624-634
Type of Manuscript:  Special Section PAPER (Special Issue on High-Performance, Low-Power System LSIs and Related Technologies)
Category: Design Methods and Implementation
Keyword: 
embedded DRAM, various DRAM macros, low voltage operation, short TAT, BIST, 
 Summary | Full Text:PDF