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IEICE Trans

Du-yan BI


A VLSI Design of a Pipelining and Area-Efficient Reed-Solomon Decoder
Wei-min WANG Du-yan BI Xing-min DU Lin-hua MA 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2007/08/01
Vol. E90-D  No. 8  pp. 1301-1303
Type of Manuscript:  LETTER
Category: VLSI Systems
Keyword: 
Reed-Solomon codemodified Euclid algorithmChien search and Forney algorithmcritical path
 Summary | Full Text:PDF