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IEICE Trans

Douglas CHANG

On Improved FPGA Greedy Routing Architectures
Yu-Liang WU Douglas CHANG Malgorzata MAREK-SADOWSKA Shuji TSUKIYAMA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1998/12/25
Vol. E81-A  No. 12  pp. 2485-2491
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Layout Optimization
Keyword: 
FPGA architecture, FPGA Greedy routing architecture, 
 Summary | Full Text:PDF