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IEICE Trans

Daisuke ARAI

Maximum Output Power Design on an 85 kHz Class-D Half-Bridge ZVS Inverter with Power-MOSFETs
Yi XIONG Senanayake THILAK Daisuke ARAI Jun IMAOKA Masayoshi YAMAMOTO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2025/05/01
Vol. E108-A  No. 5  pp. 722-735
Type of Manuscript:  PAPER
Category: Circuit Theory
Keyword: 
85 kHz, class-D half-bridge inverter, ZVS, maximum output power, Si-MOSFET, SiC-MOSFET, 
 Summary | Full Text:PDF