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IEICE Trans

Claudio NANI

Architectural Exploration and Design of Time-Interleaved SAR Arrays for Low-Power and High Speed A/D Converters
Sergio SAPONARA Pierluigi NUZZO Claudio NANI Geert VAN DER PLAS Luca FANUCCI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2009/06/01
Vol. E92-C  No. 6  pp. 843-851
Type of Manuscript:  Special Section PAPER (Special Section on Analog Circuits and Related SoC Integration Technologies)
Category: 
Keyword: 
A/D converters, time interleaving, analog CMOS circuits, system level design, SAR, low power design, 
 Summary | Full Text:PDF