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IEICE Trans

Chong Suck RIM

Design of Low Power QPP Interleave Address Generator Using the Periodicity of QPP
Won-Ho LEE Chong Suck RIM 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2009/06/01
Vol. E92-A  No. 6  pp. 1538-1540
Type of Manuscript:  LETTER
Category: VLSI Design Technology and CAD
Keyword: 
QPP, interleaver, low power design, turbo decoder, address generator, 
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