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IEICE Trans

Changsik YOO

A Low-Jitter Delay-Locked Loop with Harmonic-Lock Prevention
Sungkyung PARK Changsik YOO Sin-Chong PARK 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2002/02/01
Vol. E85-A  No. 2  pp. 505-507
Type of Manuscript:  LETTER
Category: Circuit Theory
Keyword: 
four-state dynamic phase detector, harmonic locking, DLL, 
 Summary | Full Text:PDF