Daisy-chained Systolic Array and Reconfigurable Memory Space for Narrow Memory Bandwidth

Jun IWAMOTO  Yuma KIKUTANI  Renyuan ZHANG  Yasuhiko NAKASHIMA  

Publication:   IEICE TRANSACTIONS on Information and Systems
Publicized: 2019/12/06
DOI: 10.1587/transinf.2019EDP7144
Full Text: PDF(409.5KB)