Designing a High Performance SRAM-DRAM Hybrid Memory Architecture for Packet Buffers

Yongwoon SONG  Dongkeon CHOI  Hyukjun LEE  

Publication:   IEICE TRANSACTIONS on Electronics
Publicized: 2019/06/25
DOI: 10.1587/transele.2019ECS6003
Full Text: PDF(412.2KB)