Array Design of High-Density Emerging Memories Making Clamped Bit-Line Sense Amplifier Compatible with Dummy Cell Average Read Scheme

Ziyue ZHANG  Takashi OHSAWA  

Publication:   IEICE TRANSACTIONS on Electronics
Publicized: 2020/02/26
DOI: 10.1587/transele.2019ECP5039
Full Text: PDF(1.7MB)