Complete Extraction of Trap Densities in Polycrystalline-Silicon Thin-Film Transistors

Takuto YOSHINO  Kiyoshi HARADA  Mutsumi KIMURA  

Publication
C - Abstracts of IEICE TRANSACTIONS on Electronics (Japanese Edition)   Vol.J93-C   No.2   pp.48-55
Publication Date: 2010/02/01
Online ISSN: 1881-0217
DOI: 
Print ISSN: 1345-2827
Type of Manuscript: PAPER
Category: 
Keyword: 
polycrystalline-silicon thin-film transistor,  poly-si TFT,  trap density,  insulator interface,  grain boundary,  

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Summary: 
We have developed a method to completely extract trap densities at front and back insulator interfaces and grain boundaries in polycrystalline-silicon thin-film transistors. These trap densities are extracted from front and back low-frequency C-V and I-V characteristics using Poison equation, carrier density equations and 2-dimentional device simulator. Actual trap densities were extracted to evaluate oxygen and hydrogen plasma treatments. It was found that these trap densities have different energy profiles and the oxygen plasma treatment has trap density reduction effect but cannot diffuse to the back insulator interface. In conclusion, this method is useful to evaluate film and device characteristics.