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Proposal of Stacked Type Fe-FET Combinational Circuit / Memory for Its Evaluation Results for Non-volatile Sequential Circuits with BiCS Technology
Tomohiro YOKOTA Shigeyoshi WATANABE
C - Abstracts of IEICE TRANSACTIONS on Electronics (Japanese Edition)
Publication Date: 2017/10/01
Online ISSN: 1881-0217
Type of Manuscript: PAPER
NAND type memory, BiCS technology, Fe-FET, stacked structure, sequential circuit, combinational circuit, non-volatile,
Full Text(in Japanese): PDF(1.6MB)
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Vertical stacked type Fe-FET combinational circuit/memory for its evaluation results for non-volatile sequential circuits with BiCS technology has been newly proposed. In this scheme conventional flip flop circuit which uses more than 20 Fe-FETs has been successfully replaced by the only one Fe-FET stacked on the combinational circuit. As a result, more than X20 cost performance defined by (fabrication cost) * (cycle time for read/erase/program operation) can be successfully realized compared with that of conventional flip circuit scheme. The proposed scheme is promising candidate for realizing high cost performance non-volatile sequential circuit.