Reseeding-Oriented Test Power Reduction for Linear-Decompression-Based Test Compression Architectures

Tian CHEN  Dandan SHEN  Xin YI  Huaguo LIANG  Xiaoqing WEN  Wei WANG  

Publication
IEICE TRANSACTIONS on Information and Systems   Vol.E99-D   No.11   pp.2672-2681
Publication Date: 2016/11/01
Online ISSN: 1745-1361
DOI: 10.1587/transinf.2015EDP7289
Type of Manuscript: PAPER
Category: Computer System
Keyword: 
low power test,  data compression,  LFSR,  X-filling,  

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Summary: 
Linear feedback shift register (LFSR) reseeding is an effective method for test data reduction. However, the test patterns generated by LFSR reseeding generally have high toggle rate and thus cause high test power. Therefore, it is feasible to fill X bits in deterministic test cubes with 0 or 1 properly before encoding the seed to reduce toggle rate. However, X-filling will increase the number of specified bits, thus increase the difficulty of seed encoding, what's more, the size of LFSR will increase as well. This paper presents a test frame which takes into consideration both compression ratio and power consumption simultaneously. In the first stage, the proposed reseeding-oriented X-filling proceeds for shift power (shift filling) and capture power (capture filling) reduction. Then, encode the filled test cubes using the proposed Compatible Block Code (CBC). The CBC can X-ize specified bits, namely turning specified bits into X bits, and can resolve the conflict between low-power filling and seed encoding. Experiments performed on ISCAS'89 benchmark circuits show that our scheme attains a compression ratio of 94.1% and reduces capture power by at least 15% and scan-in power by more than 79.5%.