A 9.35-ENOB, 14.8 fJ/conv.-step Fully-Passive Noise-Shaping SAR ADC

Zhijie CHEN  Masaya MIYAHARA  Akira MATSUZAWA  

Publication
IEICE TRANSACTIONS on Electronics   Vol.E99-C   No.8   pp.963-973
Publication Date: 2016/08/01
Online ISSN: 1745-1353
DOI: 10.1587/transele.E99.C.963
Type of Manuscript: PAPER
Category: Electronic Circuits
Keyword: 
fully passive noise shaping,  charge-redistribution,  SAR ADC,  noise transfer function,  zeros,  poles,  

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Summary: 
This paper proposes an opamp-free solution to implement single-phase-clock controlled noise shaping in a SAR ADC. Unlike a conventional noise shaping SAR ADC, the proposal realizes noise shaping by charge redistribution, which is a passive technique. The passive implementation has high power efficiency. Meanwhile, since the proposal maintains the basic architecture and operation method of a traditional SAR ADC, it retains all the advantages of a SAR ADC. Furthermore, noise shaping helps to improve the performance of SAR ADC and relaxes its non-ideal effects. Designed in a 65-nm CMOS technology, the prototype realizes 58-dB SNDR based on an 8-bit C-DAC at 50-MS/s sampling frequency. It consumes 120.7-µW power from a 0.8-V supply and achieves a FoM of 14.8-fJ per conversion step.