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A 12.5Gbps CDR with Differential to Common Converting Edge Detector for the Wired and Wireless Serial Link
Kaoru KOHIRA Hiroki ISHIKURO
IEICE TRANSACTIONS on Electronics
Publication Date: 2016/04/01
Online ISSN: 1745-1353
Type of Manuscript: PAPER
Category: Electronic Circuits
CDR, injection locking, edge detectors, high speed,
Full Text: PDF(1.9MB)>>
This paper introduces low-power and small area injection-locking clock and data recovery circuit (CDR) for the wireline and wireless proximity link. By using signal conversion from differential input to common-mode output, the newly proposed edge detector can eliminate the usually used delay line and XOR-based edge detector, and provided low power operation and a small circuit area. The CDR test chip fabricated in a 65-nm CMOS process consumes 30mW from a 1.2- V supply at 12.5Gbps. The fabricated CDR achieved a BER lower than 10-12 and the recovered clock had an rms jitter of 0.87ps. The CDR area is 0.165mm2.