An On-Chip Measurement of PLL Transfer Function and Lock Range through Fully Digital Interface

Toshiyuki KIKKAWA  Toru NAKURA  Kunihiro ASADA  

Publication
IEICE TRANSACTIONS on Electronics   Vol.E99-C   No.2   pp.275-284
Publication Date: 2016/02/01
Online ISSN: 1745-1353
DOI: 10.1587/transele.E99.C.275
Type of Manuscript: PAPER
Category: Electronic Circuits
Keyword: 
PLL,  transfer function,  lock range,  on-chip measurement,  

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Summary: 
This paper proposes an on-chip measurement method of PLL through fully digital interface. For the measurement of the PLL transfer function, we modulated the phase of the PLL input in triangular form using Digital-to-Time Converter (DTC) and read out the response by Time-to-Digital Converter (TDC). Combination of the DTC and TDC can obtain the transfer function of the PLL both in the magnitude domain and the phase domain. Since the DTC and TDC can be controlled and observed by digital signals, the measurement can be conducted without any high speed analog signal. Moreover, since the DTC and TDC can be designed symmetrically, the measurement method is robust against Process, Voltage, and Temperature (PVT) variations. At the same time, the employment of the TDC also enables a measurement of the PLL lock range by changing the division ratio of the divider. Two time domain circuits were designed using 180nm CMOS process and the HSPICE simulation results demonstrated the measurement of the transfer function and lock range.