An 11-Bit Single-Ended SAR ADC with an Inverter-Based Comparator for Design Automation

Guan-Wei JEN  Wei-Liang LIN  

IEICE TRANSACTIONS on Electronics   Vol.E99-C   No.12   pp.1331-1334
Publication Date: 2016/12/01
Online ISSN: 1745-1353
DOI: 10.1587/transele.E99.C.1331
Type of Manuscript: BRIEF PAPER
Category: Electronic Circuits
analog-to-digital converter,  successive approximation register ADC,  inverter-based,  design automation,  

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This paper proposes a low power single-ended successive approximation register (SAR) analog-to-digital converter (ADC) to replace the only analog active circuit, the comparator, with a digital circuit, which is an inverter-based comparator. The replacement helps possible design automation. The inverter threshold voltage variation impact is minimal because an SAR ADC has only one comparator, and many applications are either insensitive to the resulting ADC offset or easily corrected digitally. The proposed resetting approach mitigates leakage when the input is close to the threshold voltage. As an intrinsic headroom-free, and thus low-rail-voltage, friendly structure, an inverter-based comparator also occupies a small area. Furthermore, an 11-bit ADC was designed and manufactured through a 0.35-µm CMOS process by adopting a low-power switching procedure. The ADC achieves an FOM of 181fJ/Conv.-step at a 25kS/s sampling rate when the supply voltage VDD is 1.2V.