A Wideband Asymmetric Digital Predistortion Architecture for 60 GHz Short Range Wireless Transmitters

Kenji MIYANAGA  Masashi KOBAYASHI  Noriaki SAITO  Naganori SHIRAKATA  Koji TAKINAMI  

Publication
IEICE TRANSACTIONS on Electronics   Vol.E99-C   No.10   pp.1190-1199
Publication Date: 2016/10/01
Online ISSN: 1745-1353
DOI: 10.1587/transele.E99.C.1190
Type of Manuscript: Special Section PAPER (Special Section on Microwave and Millimeter-Wave Technology)
Category: 
Keyword: 
digital predistortion (DPD),  power amplifier (PA),  adjacent channel leakage power,  complex filter,  wide-bandwidth,  WiGig,  CMOS,  60 GHz,  

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Summary: 
This paper presents a wideband digital predistortion (DPD) architecture suitable for wideband wireless systems, such as IEEE 802.11ad/WiGig, where low oversampling ratio of the digital-to-analog converter (DAC) is a bottleneck for available linearization bandwidth. In order to overcome the bandwidth limitation in the conventional DPD, the proposed DPD introduces a complex coefficient filter in the DPD signal processing, which enables it to achieve asymmetric linearization. This approach effectively suppresses one side of adjacent channel leakages with twice the bandwidth as compared to the conventional DPD. The concept is verified through system simulation and measurements. Using a scaled model of a 2 GHz RF carrier frequency, the measurement shows a 4.2 dB advantage over the conventional DPD in terms of adjacent channel leakage.