Analog and Digital Collaborative Design Techniques for Wireless SoCs

Ryuichi FUJIMOTO  

IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences   Vol.E99-A   No.2   pp.514-522
Publication Date: 2016/02/01
Online ISSN: 1745-1337
DOI: 10.1587/transfun.E99.A.514
Type of Manuscript: INVITED PAPER (Special Section on Analog Circuit Techniques and Related Topics)
wireless,  SoC,  ISDB-T,  1-segmant broadcasting,  TransferJet,  Wireless LAN,  spurious signal,  digital pre-distortion,  mismatch calibration,  low power consumption,  

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Analog and digital collaborative design techniques for wireless SoCs are reviewed in this paper. In wireless SoCs, delicate analog performance such as sensitivity of the receiver is easily degraded due to interferences from digital circuit blocks. On the other hand, an analog performance such as distortion is strongly compensated by digital assist techniques with low power consumption. In this paper, a sensitivity recovery technique using the analog and digital collaborative design, and digital assist techniques to achieve low-power and high-performance analog circuits are presented. Such analog and digital collaborative design is indispensable for wireless SoCs.