Distributed Synchronization for Message-Passing Based Embedded Multiprocessors

Hao XIAO  Ning WU  Fen GE  Guanyu ZHU  Lei ZHOU  

IEICE TRANSACTIONS on Information and Systems   Vol.E98-D   No.2   pp.272-275
Publication Date: 2015/02/01
Online ISSN: 1745-1361
DOI: 10.1587/transinf.2014RCL0001
Type of Manuscript: Special Section LETTER (Special Section on Reconfigurable Systems)
Category: Architecture
embedded multiprocessors,  synchronization,  message-passing,  application-specific instruction-set processor,  

Full Text: PDF(818.8KB)>>
Buy this Article

This paper presents a synchronization mechanism to effectively implement the lock and barrier protocols in a decentralized manner through explicit message passing. In the proposed solution, a simple and efficient synchronization control mechanism is proposed to support queued synchronization without contention. By using state-of-the-art Application-Specific Instruction-set Processor (ASIP) technology, we embed the synchronization functionality into a baseline processor, making the proposed mechanism feature ultra-low overhead. Experimental results show the proposed synchronization achieves ultra-low latency and almost ideal scalability when the number of processors increases.