IEICE Trans - A Self-Recoverable, Frequency-Aware and Cost-Effective Robust Latch Design for Nanoscale CMOS Technology

A Self-Recoverable, Frequency-Aware and Cost-Effective Robust Latch Design for Nanoscale CMOS Technology

Aibin YAN  Huaguo LIANG  Zhengfeng HUANG  Cuiyun JIANG  Maoxiang YI

Publication
IEICE TRANSACTIONS on Electronics   Vol.E98-C    No.12    pp.1171-1178
Publication Date: 2015/12/01
Online ISSN: 1745-1353
DOI: 10.1587/transele.E98.C.1171
Type of Manuscript: PAPER
Category: Electronic Circuits
Keyword:
transient fault,  single event upset,  soft error,  radiation hardening,  circuit reliability,

Full Text: PDF(1.7MB)>>

Summary:
In this paper, a self-recoverable, frequency-aware and cost-effective robust latch (referred to as RFC) is proposed in 45nm CMOS technology. By means of triple mutually feedback Muller C-elements, the internal nodes and output node of the latch are self-recoverable from single event upset (SEU), i.e. particle striking induced logic upset, regardless of the energy of the striking particle. The proposed robust latch offers a much wider spectrum of working clock frequency on account of a smaller delay and insensitivity to high impedance state. The proposed robust latch performs with lower costs regarding power and area than most of the compared latches. SPICE simulation results demonstrate that the area-power-delay product is 73.74% saving on average compared with previous radiation hardened latches.