99.4% Switching Energy Saving and 87.5% Area Reduction Switching Scheme for SAR ADC

Li BIN  Deng ZHUN  Xie LIANG  Xiangliang JIN  

IEICE TRANSACTIONS on Electronics   Vol.E98-C   No.10   pp.984-986
Publication Date: 2015/10/01
Online ISSN: 1745-1353
DOI: 10.1587/transele.E98.C.984
Type of Manuscript: BRIEF PAPER
Category: Electronic Circuits
analog-to-digital converter (ADC),  successive approximation register (SAR),  energy saving,  

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A high energy-efficiency and area-reduction switching scheme for a low-power successive approximation register (SAR) analog-to-digital converter (ADC) is presented. Based on the sequence initialization, monotonic capacitor switching procedure and multiple reference voltages, the average switching energy and total capacitance of the proposed scheme are reduced by 99.4% and 87.5% respectively, compared to the conventional architecture.