Fast Transient Simulation of Large Scale RLC Networks Including Nonlinear Elements with SPICE Level Accuracy

Yuichi TANJI  

Publication
IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences   Vol.E98-A   No.5   pp.1067-1076
Publication Date: 2015/05/01
Online ISSN: 1745-1337
DOI: 10.1587/transfun.E98.A.1067
Type of Manuscript: PAPER
Category: VLSI Design Technology and CAD
Keyword: 
SPICE,  inductance,  capacitance,  signal/power integrity,  FDTD,  

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Summary: 
Fast simulation techniques of large scale RLC networks with nonlinear devices are presented. Generally, when scale of nonlinear part in a circuit is much less than the linear part, matrix or circuit partitioning approach is known to be efficient. In this paper, these partitioning techniques are used for the conventional transient analysis using an implicit numerical integration and the circuit-based finite-difference time-domain (FDTD) method, whose efficiency and accuracy are evaluated developing a prototype simulator. It is confirmed that the matrix and circuit partitioning approaches do not degrade accuracy of the transient simulations that is compatible to SPICE, and that the circuit partitioning approach is superior to the matrix one in efficiency. Moreover, it is demonstrated that the circuit-based FDTD method can be efficiently combined with the matrix or circuit partitioning approach, compared with the transient analysis using an implicit numerical integration.