Highly Reliable Non-volatile Logic Circuit Technology and Its Application

Hiromitsu KIMURA  Zhiyong ZHONG  Yuta MIZUOCHI  Norihiro KINOUCHI  Yoshinobu ICHIDA  Yoshikazu FUJIMORI  

Publication
IEICE TRANSACTIONS on Information and Systems   Vol.E97-D   No.9   pp.2226-2233
Publication Date: 2014/09/01
Online ISSN: 1745-1361
DOI: 10.1587/transinf.2013LOP0017
Type of Manuscript: INVITED PAPER (Special Section on Multiple-Valued Logic and VLSI Computing)
Category: 
Keyword: 
non-volatile logic,  non-volatile flip-flop,  ferroelectric capacitor,  high reliability,  data protection,  

Full Text: FreePDF


Summary: 
A ferroelectric-based (FE-based) non-volatile logic is proposed for low-power LSI. Standby currents in a logic circuit can be cut off by using FE-based non-volatile flip-flops (NVFFs), and the standby power can be reduced to zero. The FE capacitor is accessed only when the power turns on/off, performance of the NVFF is almost as same as that of the conventional flip-flop (FF) in a logic operation. The use of complementarily stored data in coupled FE capacitors makes it possible to realize wide read voltage margin, which guarantees 10 years retention at 85 degree Celsius under less than 1.5V operation. The low supply voltage and electro-static discharge (ESD) detection technique prevents data destruction caused by illegal access for the FE capacitor during standby state. Applying the proposed circuitry in CPU, the write and read operation for all FE capacitors in 1.6k-bit NVFFs are performed within 7µs and 3µs with access energy of 23.1nJ and 8.1nJ, respectively, using 130nm CMOS with Pb(Zr,Ti)O3(PZT) thin films.