ILP Based Multithreaded Code Generation for Simulink Model

Kai HUANG  Min YU  Xiaomeng ZHANG  Dandan ZHENG  Siwen XIU  Rongjie YAN  Kai HUANG  Zhili LIU  Xiaolang YAN  

IEICE TRANSACTIONS on Information and Systems   Vol.E97-D   No.12   pp.3072-3082
Publication Date: 2014/12/01
Online ISSN: 1745-1361
DOI: 10.1587/transinf.2014PAP0015
Type of Manuscript: Special Section PAPER (Special Section on Parallel and Distributed Computing and Networking)
Category: Architecture
code generation,  ILP,  task mapping,  scheduling,  Simulink,  

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The increasing complexity of embedded applications and the prevalence of multiprocessor system-on-chip (MPSoC) introduce a great challenge for designers on how to achieve performance and programmability simultaneously in embedded systems. Automatic multithreaded code generation methods taking account of performance optimization techniques can be an effective solution. In this paper, we consider the issue of increasing processor utilization and reducing communication cost during multithreaded code generation from Simulink models to improve system performance. We propose a combination of three-layered multithreaded software with Integer Linear Programming (ILP) based design-time mapping and scheduling policies to get optimal performance. The hierarchical software with a thread layer increases processor usage, while the mapping and scheduling policies formulate a group of integer linear programming formulations to minimize communication cost as well as to maximize performance. Experimental results demonstrate the advantages of the proposed techniques on performance improvements.