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HighSpeed Operation of 0.25mV RSFQ Arithmetic Logic Unit Based on 10kA/cm^{2} Nb Process Technology
Masamitsu TANAKA Atsushi KITAYAMA Masakazu OKADA Tomohito KOUKETSU Takumi TAKINAMI Masato ITO Akira FUJIMAKI
Publication
IEICE TRANSACTIONS on Electronics
Vol.E97C
No.3
pp.166172 Publication Date: 2014/03/01
Online ISSN: 17451353
DOI: 10.1587/transele.E97.C.166
Print ISSN: 09168516 Type of Manuscript: Special Section PAPER (Special Section on LeadingEdge Technology of Superconductor LargeScale Integrated Circuits) Category: Keyword: singlefluxquantum logic, lowpower, lowvoltage, digital arithmetic,
Full Text: PDF(1.5MB)>>
Summary:
We report the successful operation of a lowpower arithmetic logic unit (ALU) based on a lowvoltage rapid singlefluxquantum (LVRSFQ) logic circuit, whereby a dc bias current is fed to circuits from lowered constantvoltage sources through small resistors. Both the static and dynamic energy consumptions are reduced because of the reduction in the amplitudes of voltage pulses across the Josephson junctions, with a tradeoff of slightly slower switching speeds. The designed bias voltage was set to 0.25mV, which is onetenth that of our standard RSFQ circuit design. We investigated several issues related to such lowvoltage operation, including margins and timing design. To achieve successful operation, we tuned the circuit parameters in the logic gate design and carefully controlled the timing by considering the interference of pulse signals. We show test results for the lowvoltage ALU in onchip highspeed testing. The circuit was fabricated using the AIST Nb/AlO_{x}/Nb Advanced Process with a critical current density of 10kA/cm^{2}. We verified that arithmetic and logical operations were correctly implemented and obtained dc bias margins of 18% at a target clock frequency of 20GHz and achieved a maximum clock frequency of 28GHz with a power consumption of 28µW. These experimental results indicate energy efficiency of 3.6 times that of the standard RSFQ circuit design.

