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Effective Fixed-Point Pipelined Divider for Mobile Rendering Processors
Yong-Jin PARK Woo-Chan PARK Jun-Hyun BAE Jinhong PARK Tack-Don HAN
IEICE TRANSACTIONS on Information and Systems
Publication Date: 2013/07/01
Online ISSN: 1745-1361
Print ISSN: 0916-8532
Type of Manuscript: PAPER
Category: Computer System
fixed-point divider, mobile, rendering, error analysis,
Full Text: PDF(775.6KB)>>
In this paper, we proposed that an area- and speed-effective fixed-point pipelined divider be used for reducing the bit-width of a division unit to fit a mobile rendering processor. To decide the bit-width of a division unit, error analysis has been carried out in various ways. As a result, when the original bit-width was 31-bit, the proposed method reduced the bit-width to 24-bit and reduced the area by 42% with a maximum error of 0.00001%.