NBTI Reliability of PFETs under Post-Fabrication Self-Improvement Scheme for SRAM

Nurul Ezaila ALIAS  Anil KUMAR  Takuya SARAYA  Shinji MIYANO  Toshiro HIRAMOTO  

Publication
IEICE TRANSACTIONS on Electronics   Vol.E96-C   No.5   pp.620-623
Publication Date: 2013/05/01
Online ISSN: 1745-1353
DOI: 10.1587/transele.E96.C.620
Print ISSN: 0916-8516
Type of Manuscript: BRIEF PAPER
Category: 
Keyword: 
Negative Bias Temperature Instability (NBTI),  variability,  SRAM,  transistor,  MOSFET,  

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Summary: 
In this paper, negative bias temperature instability (NBTI) reliability of pFETs is analyzed under the post-fabrication SRAM self-improvement scheme that we have developed recently, where cell stability is self-improved by simply applying high stress voltage to supply voltage terminal (VDD) of SRAM cells. It is newly found that there is no significant difference in both threshold voltage and drain current degradation by NBTI stress between fresh PFETs and PFETs after self-improvement scheme application, indicating that the self-improvement scheme has no critical reliability problem.