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A Low-Power LDPC Decoder for Multimedia Wireless Sensor Networks
Meng XU Xincun JI Jianhui WU Meng ZHANG
IEICE TRANSACTIONS on Communications
Publication Date: 2013/04/01
Online ISSN: 1745-1345
Print ISSN: 0916-8516
Type of Manuscript: PAPER
Category: Fundamental Theories for Communications
LDPC, Multimedia Wireless Sensor Networks, low power design, layered decoding, memory bypassing scheme, Benes network,
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This paper presents a low-power LDPC decoder that can be used in Multimedia Wireless Sensor Networks. Three low power design techniques are proposed in the decoder design: a layered decoding algorithm, a modified Benes network and a modified memory bypassing scheme. The proposed decoder is implemented in TSMC 0.13 µm, 1.2 V CMOS process. Experiments show that when the clock frequency is 32 MHz, the power consumption of the proposed decoder is 38.4 mW, the energy efficiency is 53.3 pJ/bit/ite and the core area is 1.8 mm2.