Efficient Utilization of Vector Registers to Improve FFT Performance on SIMD Microprocessors

Feng YU
Ruifeng GE

IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences   Vol.E96-A    No.7    pp.1637-1641
Publication Date: 2013/07/01
Online ISSN: 1745-1337
DOI: 10.1587/transfun.E96.A.1637
Print ISSN: 0916-8508
Type of Manuscript: LETTER
Category: Digital Signal Processing
fast Fourier transform (FFT),  memory reference,  single instruction multiple data (SIMD),  vector register (VR),  

Full Text: PDF>>
Buy this Article

We investigate the utilization of vector registers (VRs) on reducing memory references for single instruction multiple data fast Fourier transform calculation. We propose to group the butterfly computations in several consecutive stages to maximize utilization of the available VRs and take the advantage of the symmetries in twiddle factors. All the butterflies sharing identical twiddle factors are clustered and computed together to further improve performance. The relationship between the number of fused stages and the number of available VRs is then examined. Experimental results on different platforms show that the proposed method is effective.