Adaptive Analog-to-Information Converter Design with Limited Random Sequence Modulation

Chao ZHANG  Jialuo XIAO  

Publication
IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences   Vol.E96-A   No.2   pp.469-476
Publication Date: 2013/02/01
Online ISSN: 1745-1337
DOI: 10.1587/transfun.E96.A.469
Print ISSN: 0916-8508
Type of Manuscript: Special Section PAPER (Special Section on Analog Circuit Techniques and Related Topics)
Category: 
Keyword: 
adaptive AIC,  analog-to-information converter,  limited random sequence,  prototype system,  FPGA,  

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Summary: 
Compressive sensing enables quite lower sampling rate compared with Nyquist sampling. As long as the signal is sparsity in some basis, the random sampling with CS can be employed. In order to make CS applied in the practice, the Analog to Information Converter (AIC) should be involved. Based on the Limited Random Sequence (LRS) modulation, the AIC with LRS can be designed with high performance according to the fixed sparsity. However, if the sparsity of the signal varies with time, the original AIC with LRS is not efficient. In this paper, the adaptive AIC which adapts its scheme of LRS according to the variation of the sparsity is proposed and the prototype system is designed. Due to the adaption of the AIC with the scheme of LRS, the sampling rate can be further reduced. The simulation results confirm the performance of the proposed adaptive AIC scheme. The prototype system can successfully fulfil the random sampling and adapt to the variation of sparsity, which verify and consolidate the validity and feasibility for the future implementation of adaptive AIC on chip.