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Low Power Clock Gating for Shift Register
Ki-Sung SOHN Da-In HAN Ki-Ju BAEK Nam-Soo KIM Yeong-Seuk KIM
IEICE TRANSACTIONS on Electronics
Publication Date: 2012/08/01
Online ISSN: 1745-1353
Print ISSN: 0916-8516
Type of Manuscript: BRIEF PAPER
Category: Electronic Circuits
low power, small area, clock gating circuit,
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A new clock gating circuit suitable for shift register is presented. The proposed clock gating circuit that consists of basic NOR gates is low power and small area. The power consumption of a 16-bit shift register implemented with the proposed clock gating circuit is about 66% lower than that found when using the conventional design.