Stress-Induced Capacitance of Partially Depleted MOSFETs from Ring Oscillator Delay

Wen-Teng CHANG  

Publication
IEICE TRANSACTIONS on Electronics   Vol.E95-C   No.5   pp.802-806
Publication Date: 2012/05/01
Online ISSN: 1745-1353
DOI: 10.1587/transele.E95.C.802
Print ISSN: 0916-8516
Type of Manuscript: Special Section PAPER (Special Section on Fundamentals and Applications of Advanced Semiconductor Devices)
Category: 
Keyword: 
Partially depleted MOSFET,  strained channel,  piezoresistance coefficient,  ring oscillator,  stress-induced capacitance,  

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Summary: 
In the current study, stress-induced capacitance determined by direct measurement on MOSFETs was compared with that determined by indirect simulation through the delay of CMOS ring oscillators (ROs) fabricated side by side with MOSFETs. External compressive stresses were applied on <110> silicon-on-insulator (SOI) n-/p-MOSFETs with the ROs in a longitudinal configuration. The measured gate capacitance decreased as the compressive stress on SOI increased, which agrees with the result of the capacitance difference between measured and simulated delay of the ROs. The oscillation frequency shift of the ROs should mainly be attributed to oxide capacitance, aside from the change in mobility of the n-/p-MOSFETs. The result suggests that the stress-induced gate capacitance of partially depleted MOSFETs is an important factor for the capacitance shift in a circuit and that ROs can be used in a vehicle to determine mechanical stress-induced gate capacitance in MOSFETs.