A Schmitt Trigger Based SRAM with Vertical MOSFET

Hyoungjun NA  Tetsuo ENDOH  

Publication
IEICE TRANSACTIONS on Electronics   Vol.E95-C   No.5   pp.792-801
Publication Date: 2012/05/01
Online ISSN: 1745-1353
DOI: 10.1587/transele.E95.C.792
Print ISSN: 0916-8516
Type of Manuscript: Special Section PAPER (Special Section on Fundamentals and Applications of Advanced Semiconductor Devices)
Category: 
Keyword: 
Schmitt Trigger based SRAM (ST SRAM),  6T SRAM,  vertical MOSFET,  cell size,  stability,  static noise margin (SNM),  speed performance,  read time,  read current,  

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Summary: 
In this paper, a Schmitt Trigger based 10T SRAM (ST 10T SRAM) cell with the vertical MOSFET is proposed for low supply voltage operation, and its impacts on cell size, stability and speed performance are investigated. The proposed ST 10T SRAM cell with the vertical MOSFET achieves smaller cell size than the ST 10T SRAM cell with the conventional planar MOSFET. Moreover, the proposed SRAM cell realizes large and constant static noise margin (SNM) against bottom node resistance of the vertical MOSFET without any architectural changes from the present 6T SRAM architecture. The proposed SRAM cell also suppresses the degradation of the read time of the ST 10T SRAM cell due to the back-bias effect free characteristic of the vertical MOSFET. The proposed ST 10T SRAM cell with the vertical MOSFET is a superior SRAM cell for low supply voltage operation with a small cell size, stable operation, and fast speed performance with the present 6T SRAM architecture.