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On-Chip In-Place Measurements of Vth and Signal/Substrate Response of Differential Pair Transistors
Yoji BANDO Satoshi TAKAYA Toru OHKAWA Toshiharu TAKARAMOTO Toshio YAMADA Masaaki SOUDA Shigetaka KUMASHIRO Tohru MOGAMI Makoto NAGATA
IEICE TRANSACTIONS on Electronics
Publication Date: 2012/01/01
Online ISSN: 1745-1353
Print ISSN: 0916-8516
Type of Manuscript: PAPER
Category: Electronic Circuits
on-chip monitor, substrate noise, differential amplifier,
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In-place AC measurements of the signal gain and substrate sensitivity of differential pair transistors of an analog amplifier are combined with DC characterization of the threshold voltage (Vth) of the same transistors. An on-chip continuous time waveform monitoring technique enables in-place matrix measurements of differential pair transistors with a variety of channel sizes and geometry, allowing the wide coverage of experiments about the transistor-level physical layout dependency of substrate noise response. A prototype test structure uses a 90-nm CMOS technology and demonstrates the geometry-dependent variation of substrate sensitivity of transistors in operation.