A 60 GHz CMOS Transceiver IC for a Short-Range Wireless System with Amplitude/Phase Imbalance Cancellation Technique

Koji TAKINAMI  Junji SATO  Takahiro SHIMA  Mitsuhiro IWAMOTO  Taiji AKIZUKI  Masashi KOBAYASHI  Masaki KANEMARU  Yohei MORISHITA  Ryo KITAMURA  Takayuki TSUKIZAWA  Koichi MIZUNO  Noriaki SAITO  Kazuaki TAKAHASHI  

Publication
IEICE TRANSACTIONS on Electronics   Vol.E95-C   No.10   pp.1598-1609
Publication Date: 2012/10/01
Online ISSN: 1745-1353
DOI: 10.1587/transele.E95.C.1598
Print ISSN: 0916-8516
Type of Manuscript: Special Section PAPER (Special Section on Recent Progress in Microwave and Millimeter-Wave Technologies)
Category: 
Keyword: 
CMOS,  millimeter-wave,  direct conversion,  amplitude/phase imbalance,  phase locked loop (PLL),  injection locked frequency divider,  calibration,  push-push voltage controlled oscillator,  60 GHz,  

Full Text: PDF>>
Buy this Article




Summary: 
A 60 GHz direct conversion transceiver which employs amplitude/phase imbalance cancellation technique is newly proposed. By using the proposed technique, the receive path of the transceiver achieves less than 0.2 dB of amplitude error and less than 3 of phase error at 60 GHz bands over a 10 GHz bandwidth, which relaxes the design accuracy required for baluns used in the transceiver. It also employs a simple and fast calibration algorithm to adjust the locking range of the divide-by-3 injection locked divider in the phase locked loop. Fabricated in 90 nm CMOS technology, the transceiver achieves a low power consumption of 230 mW in transmit mode and 173 mW in receive mode. The output spectrum of 1.76 Gsps π/2-BPSK/QPSK modulation shows the excellent distortion and spurious suppression that meet the IEEE802.11ad draft standard.