Cumulative Differential Nonlinearity Testing of ADCs

Hungkai CHEN  Yingchieh HO  Chauchin SU  

IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences   Vol.E95-A   No.10   pp.1768-1775
Publication Date: 2012/10/01
Online ISSN: 1745-1337
DOI: 10.1587/transfun.E95.A.1768
Print ISSN: 0916-8508
Type of Manuscript: PAPER
Category: Measurement Technology
cumulative differential nonlinearity,  gain error,  jitter calibration,  analog-to-digital converters (ADCs),  

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This paper proposes a cumulative DNL (CDNL) test methodology for the BIST of ADCs. It analyzes the histogram of the DNL of a predetermined k LSBs distance to determine the DNL and gain error. The advantage of this method over others is that the numbers of required code bins and required samples are significantly reduced. The simulation and measurements of a 12-bit ADC show that the proposed CDNL has an error of less than 5% with only 212 samples, which can only be achieved with 222 samples using the conventional method. It only needs 16 registers to store code bins in this experiment.