Noise-Tolerant DAC BIST Scheme Using Integral Calculus Approach

Hyeonuk SON  Incheol KIM  Sang-Goog LEE  Jin-Ho AHN  Jeong-Do KIM  Sungho KANG  

Publication
IEICE TRANSACTIONS on Electronics   Vol.E94-C   No.8   pp.1344-1347
Publication Date: 2011/08/01
Online ISSN: 1745-1353
DOI: 10.1587/transele.E94.C.1344
Print ISSN: 0916-8516
Type of Manuscript: LETTER
Category: Electronic Circuits
Keyword: 
digital-to-analogue converter (DAC),  built-in self-test (BIST),  noise-immunity,  static testing,  

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Summary: 
This paper proposes a built-in self-test (BIST) scheme for noise-tolerant testing of a digital-to-analogue converter (DAC). The proposed BIST calculates the differences in output voltages between a DAC and test modules. These differences are used as the inputs of an integrator that determines integral nonlinearity (INL). The proposed method has an advantage of random noise cancelation and achieves a higher test accuracy than do the conventional BIST methods. The simulation results show high standard noise-immunity and fault coverage for the proposed method.