Design of an 8-nsec 72-bit-Parallel-Search Content-Addressable Memory Using a Phase-Change Device

Satoru HANZAWA  Takahiro HANYU  

IEICE TRANSACTIONS on Electronics   Vol.E94-C   No.8   pp.1302-1310
Publication Date: 2011/08/01
Online ISSN: 1745-1353
DOI: 10.1587/transele.E94.C.1302
Print ISSN: 0916-8516
Type of Manuscript: PAPER
Category: Integrated Electronics
content addressable memory,  CAM,  parallel search,  phase-change device,  one-hot coding,  nonvolatile memory,  

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This paper presents a content-addressable memory (CAM) using a phase-change device. A hierarchical match-line structure and a one-hot-spot block code are indispensable to suppress the resistance ratio of the phase-change device and the area overhead of match detectors. As a result, an 8-nsec 72-bit-parallel-search CAM is implemented using a phase-change-device/MOS-hybrid circuitry, where high and low resistances are higher than 2.3 MΩ and lower than 97 kΩ, respectively, while maintaining one-day retention.