DFV-Aware Flip-Flops Using C-Elements

Changnoh YOON
Youngmin CHO
Jinsang KIM

Publication
IEICE TRANSACTIONS on Electronics   Vol.E94-C    No.7    pp.1229-1232
Publication Date: 2011/07/01
Online ISSN: 1745-1353
DOI: 10.1587/transele.E94.C.1229
Print ISSN: 0916-8516
Type of Manuscript: BRIEF PAPER
Category: Electronic Circuits
Keyword: 
design-for-variability,  flip-flop,  nanometer process,  PVT variation,  single event upset,  

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Summary: 
Advanced nanometer circuits are susceptible to errors caused by process, voltage, and temperature (PVT) variations or due to a single event upset (SEU). State-of-the-art design-for-variability (DFV)-aware flip-flops (FFs) suffer from their area and timing overheads. By utilizing C-element modules, two types of FFs are proposed for error detection and error correction.