For Full-Text PDF, please login, if you are a member of IEICE,|
or go to Pay Per View on menu list, if you are a nonmember of IEICE.
An Area-Efficient, Low-Power CMOS Fractional Bandgap Reference
Indika U. K. BOGODA APPUHAMYLAGE Shunsuke OKURA Toru IDO Kenji TANIGUCHI
IEICE TRANSACTIONS on Electronics
Publication Date: 2011/06/01
Online ISSN: 1745-1353
Print ISSN: 0916-8516
Type of Manuscript: Special Section PAPER (Special Section on Analog Circuits and Related SoC Integration Technologies)
bandgap reference (BGR), area-efficient, low-power, temperature coefficient, CMOS,
Full Text: PDF>>
This paper proposes an area efficient, low power, fractional CMOS bandgap reference (BGR) utilizing switched-current and current-memory techniques. The proposed circuit uses only one parasitic bipolar transistor and built-in current source to generate reference voltage. Therefore significant area and power reduction is achieved, and bipolar transistor device mismatch is eliminated. In addition, output reference voltage can be set to almost any value. The proposed circuit is designed and simulated in 0.18 µm CMOS process, and simulation results are presented. With a 1.6 V supply, the reference produces an output of about 628.5 mV, and simulated results show that the temperature coefficient of output is less than 13.8 ppm/ in the temperature range from 0 to 100. The average current consumption is about 8.5 µA in the above temperature range. The core circuit, including current source, opamp, current mirrors and switched capacitor filters, occupies less than 0.0064 mm2 (80 µm×80 µm).